In recent years, a resistance random access memory (ReRAM) acting as a semiconductor memory replacing a flash memory on the verge of limitation of miniaturization has been studied. As an example among the semiconductor memories, a phase change memory using chalcogenide material as a recording material has been actively studied.
The phase change memory is a nonvolatile solid state memory device for storing information using the property that a phase change material such as Ge2Sb2Te5 being a recording material increases in resistance in an amorphous state and decreases in resistance in a crystalline state. The fundamental device structure is such that a phase change film is sandwiched between a pair of metal electrodes.
Data reading is performed such that a potential difference is applied across both ends of the device to measure current flowing into the device, thereby determining whether the device is in a high resistance state or in a low resistance state. Data is rewritten such that the state of the phase change film is changed between the amorphous and crystalline states by Joule heat generated by the current.
Reset operation, in other words, the operation that the state of the phase change film is changed to the amorphous state of high resistance, is performed such that a relatively large current is caused to flow to melt the phase change film and then the current is rapidly decreased to quench the phase change film. On the other hand, set operation, in other words, the operation that the state of the phase change film is changed to the crystalline state of low resistance, is performed such that a relatively small current is caused to flow to keep the phase change film at a crystallization temperature or higher.
The phase change film in the phase change memory is decreased in volume as the phase change memory is miniaturized, in order to decrease current required to change the resistance.
Patent document 1 (Japanese Unexamined Patent Application Publication No. 2008-218492) discloses a multi-valued memory technique in which phase change areas are provided at a portion where the phase change film is in contact with an upper electrode (an upper heater) and a portion where the phase change film is in contact with a lower electrode (a lower heater) and the portion where the phase change film is in contact with the upper electrode is made larger in area than the portion where the phase change film is in contact with the upper electrode to write two bits in a one-bit memory cell area.
Patent document 2 (Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2007-501519) discloses that Ti, TiN, TiSiN, AlTiN, TiW, C, SiC, TaN, polycrystalline silicon are suited for an electrode material sandwiching the phase change film.
Patent document 3 (Japanese Unexamined Patent Application Publication No. 2009-117854) discloses that C, W, Mo, TiN, TiW are suited for a resistor material in a phase change memory in which a first layer formed of a phase change material and a second layer (a heater) formed of the resistor material are provided between a first and a second electrode.
Patent document 4 (Japanese Unexamined Patent Application Publication No. 2010-010688) discloses a technique in which a metal silicide layer acting as a diffusion barrier and a Schottky barrier is provided at a crossing portion of a first and a second electrode in a resistance change memory in which a recording layer (a data storage layer) acting as a phase transition resistor is provided at the crossing portion of the first and second electrodes.